DIP-switches and buttons information
The MSE-Embedded platform contains one 8-position DIP-switche and twelve buttons as shown in the below figure.
Each of these switches and buttons is connected to an individual FPGA-pin. In case a switch is activated it gives 0V (logic 1) and if it is not activated it gives VCC (logic 0) on the FPGA-pin (the switches are therefore active low). Furthermore, all switches do not include a debouncing circuit and are connected to clock-inputs of the FPGA.
DIP-switch(es) information
The below table indicates at which FPGA-pin each of the switches of the DIP-switches is connected. And here you find an example tcl script that can be used for pin-assignment in Quartus.
<html> <table align=“center” style=“float:center” border=1> <tr> <th>Switch</th><th>1</th><th>2</th><th>3</th><th>4</th><th>5</th><th>6</th><th>7</th><th>8</th> </tr> <tr> <th>DIP-switch</th> <td>PIN_B11</td><td>PIN_A11</td><td>PIN_B12</td><td>PIN_A12</td> <td>PIN_AA12</td><td>PIN_AB12</td><td>PIN_AA11</td><td>PIN_AB11</td> </tr> </table> </html>
Button(s) information
The below table indicates at which FPGA-pin each of the buttons is connected. And here you find an example tcl script that can be used for pin-assignment in Quartus.
<html> <table align=“center” style=“float:center” border=1>
<tr>
<th>BUTTON1</td>
<th>BUTTON2</td>
<th>BUTTON3</td>
</tr>
<tr>
<td>PIN_H11</td>
<td>PIN_H10</td>
<td>PIN_G11</td>
</tr>
<tr>
<th>BUTTON4</td>
<th>BUTTON5</td>
<th>BUTTON6</td>
</tr>
<tr>
<td>PIN_G10</td>
<td>PIN_G9</td>
<td>PIN_G8</td>
</tr>
<tr>
<th>BUTTON7</td>
<th>BUTTON8</td>
<th>BUTTON9</td>
</tr>
<tr>
<td>PIN_G7</td>
<td>PIN_F7</td>
<td>PIN_E10</td>
</tr>
<tr>
<th>BUTTON10</td>
<th>BUTTON11</td>
<th>BUTTON12</td>
</tr>
<tr>
<td>PIN_E9</td>
<td>PIN_D7</td>
<td>PIN_D6</td>
</tr>
</table> </html>