Differences
This shows you the differences between two versions of the page.
mse-em-board:buttons [2020/04/17 15:30] – external edit 127.0.0.1 | mse-em-board:buttons [2020/09/29 15:35] (current) – adm-hga3 | ||
---|---|---|---|
Line 3: | Line 3: | ||
The MSE-Embedded platform contains one 8-position DIP-switche and twelve buttons as shown in the below figure. | The MSE-Embedded platform contains one 8-position DIP-switche and twelve buttons as shown in the below figure. | ||
- | {{ : | + | {{ mse-em-board: |
Each of these switches and buttons is connected to an individual FPGA-pin. In case a switch is activated it gives 0V (logic 1) and if it is not activated it gives VCC (logic 0) on the FPGA-pin (the switches are therefore active low). Furthermore, | Each of these switches and buttons is connected to an individual FPGA-pin. In case a switch is activated it gives 0V (logic 1) and if it is not activated it gives VCC (logic 0) on the FPGA-pin (the switches are therefore active low). Furthermore, | ||
Line 9: | Line 9: | ||
===== DIP-switch(es) information ===== | ===== DIP-switch(es) information ===== | ||
- | The below table indicates at which FPGA-pin each of the switches of the DIP-switches is connected. And {{: | + | The below table indicates at which FPGA-pin each of the switches of the DIP-switches is connected. And {{mse-em-board: |
< | < | ||
Line 25: | Line 25: | ||
===== Button(s) information ===== | ===== Button(s) information ===== | ||
- | The below table indicates at which FPGA-pin each of the buttons is connected. And {{: | + | The below table indicates at which FPGA-pin each of the buttons is connected. And {{mse-em-board: |
< | < |