====== Camera ====== The MSE-Embedded platform contains a camera as indicated in the below figure. {{ :mse-em-board:mse-em-board_camera.jpg?direct&400 |}} The MSE-Embedded board contains a 2 megapixels CMOS camera. The datasheets can be found {{:mse-em-board:mt9d112_soc2020._rev.b_.pdf|here}} and {{:mse-em-board:plcc24.jpg?linkonly| here}}. The control pins of this camera which are connected to the FPGA are listed in the table below. An example tcl-file that can be used with Quartus can be found {{:mse-em-board:pins_camera.tcl |here}}.
Function: | short: | FPGA-pin: |
---|---|---|
Serial Interface Clock | SCL | PIN_T4 |
Serial Interface Data | SDATA | PIN_P4 |
Master Clock into Sensor | MCLK | PIN_V1 |
Power Down | PWRDWN | PIN_AA1 |
Reset | RSTB | PIN_P2 |
Pixel Data Output 0 (10bit mode) | DOUT0 | PIN_Y2 |
Pixel Data Output 1 (10bit mode) | DOUT1 | PIN_Y1 |
Pixel Data Output 2 | DOUT2 | PIN_P3 |
Pixel Data Output 3 | DOUT3 | PIN_V3 |
Pixel Data Output 4 | DOUT4 | PIN_M4 |
Pixel Data Output 5 | DOUT5 | PIN_V4 |
Pixel Data Output 6 | DOUT6 | PIN_R1 |
Pixel Data Output 7 | DOUT7 | PIN_U1 |
Pixel Data Output 8 | DOUT8 | PIN_R2 |
Pixel Data Output 9 | DOUT9 | PIN_U2 |
Pixel Clock Output from Sensor | PCLK | PIN_T2 |
Active High: Frame Valid; indicates active frame | VSYNC | PIN_W2 |
Active High: Line/Data Valid; indicates active pixels | HSYNC | PIN_W1 |